Clock Glitch Fault Injection Attacks on AES Cipher

Secure cryptographic systems like the Advanced Encryption Standard (AES) are critical in safeguarding sensitive data. Despite its robust design, AES is vulnerable to fault injection attacks, particularly via clock glitches on Field Programmable Gate Arrays (FPGA). This paper investigates the impact of clock glitch-based fault injection on AES, emphasizing its susceptibility during critical encryption stages. Through experimental analysis, we design and implement a fault injection mechanism targeting the AES algorithm on an FPGA, revealing specific vulnerabilities during the MixColumns and AddRoundKey operations. The study highlights the criticality of glitch timing, where early-stage glitches primarily produce single-bit faults, mid-stage glitches escalate to multi-bit faults, and late-stage glitches most often cause structural disruptions. The introduction of an adaptive clock glitching mechanism marks a significant advancement in fault injection techniques, allowing for more precise fault induction based on real-time feedback from the AES core. Our findings underscore the need for enhanced fault detection and mitigation strategies to improve the resilience of cryptographic systems against such attacks. This work contributes to the existing literature by providing new insights into the practical implications of fault injection attacks on AES and suggests potential countermeasures for strengthening cryptographic security.